The following relates generally to wireless communication, and more specifically to the decoding received wireless communication signals. Wireless communication systems are widely deployed to provide various types of communication content such as voice, video, packet data, messaging, broadcast, and so on. These systems may be multiple-access systems capable of supporting communication with multiple users by sharing the available system resources (e.g., time, frequency, and power). Examples of such multiple-access systems include code division multiple access (CDMA) systems, time division multiple access (TDMA) systems, frequency division multiple access (FDMA) systems, 3GPP Long Term Evolution (LTE) systems, and orthogonal frequency division multiple access (OFDMA) systems.
A Turbo decoder typically is implemented in hardware, and is employed to ensure reliable transmissions in next generation wireless systems. Turbo codes in 3G and 4G wireless systems are often decoded with the Bahl, Cocke, Jelinek and Raviv (BCJR) algorithm because of its excellent decoding performance. In a Turbo decoder, various recursion architectures may be used for the computation of state metrics. This recursion hardware is widely referred as an SMU (state metric unit). It is often the most computationally intensive hardware engine in a demodulator backend. In general, the highest possible clock frequency of a Turbo decoder is determined by a path of an SMU.
In order to increase decoder clock frequency, fast radix-2 and radix-4 SMU architectures have been developed. However, significant computation overhead is introduced in these fast SMUs. For high throughput Turbo decoding, a large number of SMUs operating in parallel may be needed. As a result, the overhead of silicon area and power consumption can be significant. It may, therefore, be beneficial to create alternative designs to improve speed, increase throughput, lower cost, and/or improve power efficiency.